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Biosketch
K. Raghavendra received the B.Tech. degree in Electronics and Communication Engineering from G. Pulla Reddy Engineering College, Kurnool, India, in 2020, and the M.Tech. degree in Radar and Communication from the Defence Institute of Advanced Technology (DIAT), Pune, India, in 2023. From 2022 to 2024, he worked as a Senior Hardware Engineer at Bosch Global Software Technologies (BGSW), Bengaluru, India, including an internship period. He is currently pursuing the Ph.D. degree in Electrical Engineering at the Indian Institute of Technology Palakkad, India, where he joined in July 2024 and is working as a Senior Research Fellow (SRF). His current research interests include digital VLSI design, algorithm-to-architecture mapping, FPGA and ASIC design, and hardware acceleration of signal-processing algorithms.
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Research
Research Interests: Digital VLSI design, algorithm-to-architecture mapping, FPGA and ASIC design, and hardware acceleration of signal processing algorithms, with a focus on efficient hardware architectures for radar applications.
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Teaching
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Teaching Assistant – VLSI Design Lab, Indian Institute of Technology Palakkad (July–December 2025, 2026).
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Teaching Assistant – VLSI Architectures for Signal Processing and Machine Learning, Indian Institute of Technology Palakkad (January–May 2026).
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Instructor – Two-Day Hands-on Workshop on VLSI & FPGA Design, conducted for undergraduates from institutions outside IIT Palakkad (~40 participants), covering FPGA architecture and hands-on simulation using Synopsys VCS.
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Instructor – ASIC Design Flow Workshop, conducted for B.Tech. students, covering the fundamentals of the ASIC design flow and related implementation tools.
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Instructor – FPGA Design Flow, workshop conducted for B.Tech. students at NSS College, Palakkad (Feb 2026).
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- Phd Supervisor
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Additional Information
TitlePublicationsDescription
- Corn Leaf Disease Classification using Hybrid Convolutional Neural Networks with Spatial and Frequency Domain Features - K. Raghavendra, M. Sabarimalai Manikandan, IEEE International Conference on Machine Learning and Applied Statistics, March 2025.
- Secure Boot in Post-Quantum Era - Megha Agrawal, Kumar Duraisamy, Karthikeyan Sabari Ganesan, Shivam Gupta, Suyash Kandele, Sai Sandilya Konduru, Harika Chowdary Maddipati, K Raghavendra, Rajeev Anand Sahu, Vishal Saraswat, International Conference on Cryptology in India, Dec 2023.
- Patent Landscape in the field of Hash-Based Post-Quantum Signatures - Megha Agrawal, Kumar Duraisamy, Karthikeyan Sabari Ganesan, Shivam Gupta, Suyash Kandele, Sai Sandilya Konduru, Harika Chowdary Maddipati, K Raghavendra, Rajeev Anand Sahu, Vishal Saraswat, International Conference on Cryptology in India, Dec 2023.
TitleAdditional LinksDescription- LinkedIn: K Raghavendra
