Publications

DHOOM: Reusing Design-for-Debug Hardware for Online Monitoring
Neetu Jindal, Sandeep Chandran, Preeti Ranjan Panda, Sanjiva Prasad, Abhay Mitra, Kunal Singhal, Shubham Gupta, and Shikhar Tuli
ACM/IEEE Design Automation Conference (DAC'19) (2019)
DHOOM.pdf (754.35 KB)
Book Chapter: Debug Data Reduction Techniques
Sandeep Chandran, and Preeti Ranjan Panda
in Post-silicon Validation and Debug (eds. Prabhat Mishra, Farimah Farahmandi), Springer (2018)
Managing Trace Summaries to Minimize Stalls During Post-silicon Validation
Sandeep Chandran, Preeti Ranjan Panda, Smruti R. Sarangi, Ayan Bhattacharyya, Deepak Chauhan, and Sharad Kumar
IEEE Transactions on VLSI Systems (TVLSI) 25 (6) (2017)
A Generic Implementation of Barriers using Optical Interconnects
Sandeep Chandran, Eldhose Peter, Preeti Ranjan Panda and Smruti R. Sarangi
ACM/IEEE International Conference On VLSI Design (VLSID’16) (2016)
Extending Trace History Through Tapered Summaries in Post-silicon Validation
Sandeep Chandran, Preeti Ranjan Panda, Smruti R. Sarangi, Deepak Chauhan, Sharad Kumar
ACM/IEEE Asia and South Pacific Design Automation Conference (ASPDAC'16) (2016)
Area-aware Cache Update Trackers for Post-silicon Validation
Sandeep Chandran, Smruti R. Sarangi, and Preeti Panda
IEEE Transactions on VLSI Systems (TVLSI) 24 (5) (2016)
Architectural Support for Handling Jitter in Shared Memory based Parallel Applications
Sandeep Chandran, Prathmesh Kallurkar, Parul Gupta, and Smruti R. Sarangi
IEEE Transactions on Parallel and Distributed Systems (TPDS) 25 (5) (2014)
Space Sensitive Cache Dumping for Post Silicon Validation
Sandeep Chandran, Smruti R. Sarangi, and Preeti Ranjan Panda
ACM/IEEE Design Automation and Test in Europe (DATE’13) (2013)