Mahesh R Panicker received his B. Tech. degree in Electrical and Electronics Engineering from Rajiv Gandhi Institute of Technology (Govt. Engineering College, Kottayam) in 2003 (First rank in the University) and Ph.D. degree from School of Computer Engineering, Nanyang Technological University (NTU), Singapore in 2009. From August 2003 to July 2005, he was a lecturer with Mahatma Gandhi University, Kerala. From August 2008 to July 2010, he was a post-doctoral fellow with centre for high performance embedded systems, NTU, Singapore. In August 2010, he started his career in industry with General Electric (GE) Global Research Centre, Bangalore. He was lead research engineer with GE till April 2017. From May 2017 till May 2018, he was senior chief engineer with Samsung Research Institute, Bangalore.
Mahesh is a Senior Member with IEEE, Six Sigma Green Belt certified and a TRIZ practitioner. He has won GE wide technical excellence awards in 2013 and 2015. He has also won silver award for ten or more patents with GE. During his stay in GE, Mahesh has worked on a range of projects, which include portable foetal ECG platform, compressor blade health monitoring program, real-time detection of rotor imbalance in GE transportation locomotive engines, detection of corrosion under insulation in oil/gas pipelines in refineries, nuclear reactor rebar corrosion detection, fMRI based neuro analytics, GE’s software beamforming platform for diagnostic ultrasound imaging and low cost portable 3D ultrasound.
Mahesh’s research interests include signal processing and analytics, reconfigurable computing and area efficient low power systems with applications in diagnostic ultrasound imaging, biomedical circuits and systems, multi-standard wireless communications and industrial prognostics and health monitoring. Mahesh has published his research findings in 9 international journals, 27 conferences and 10 patents.
· Digital Signal Processing
· Reconfigurable Computing
· Low Power / Area Efficient Circuits and Systems
· Machine/Deep Learning for Imaging/Reconstruction
· Diagnostic Ultrasound Imaging
> Software Beamforming (FPGA/Reconfigurable)
> Hardware Beamforming (portable/low cost ASICs)
> MEMS based Ultrasound Arrays (cMUT/pMUT)
> Multi-resolution Signal Processing
> Spectral Estimation
· Biomedical Circuits & Systems
> Real-time Non-invasive Neuro Imaging
> Noise Models for ECG
> Low Cost ECG Holter Systems and Analytics
> Non-invasive Wellness Monitoring Systems
· Digital Front End for 5G Based Internet of Things
> Microwave Band Signal Processing Circuits and Systems
· Industrial Prognostics and Health Monitoring
> Active/Passive Sensing including Non-destructive Evaluation (NDE) signal processing (eg: corrosion detection in oil/gas pipelines, concrete rebars, rotor imbalance detection)
Research Grants (Ongoing)
- "Investigation of a portable, affordable and self-guided bedside ultrasound system for tissue and blood velocity imaging", Early Career Research (ECR) award, Science and Engineering Research Board (SERB), Rs 49,01,830, March 2019 - March 2022 (Principal Investigator)
For full list of publications: https://scholar.google.com/citations?user=FkF8Zh0AAAAJ&hl=en
- Panicker, Mahesh R., et al. "Method and system for measuring a volume of an organ of interest." U.S. Patent Application No. 15/703,377. ()
- Panicker, Mahesh Raveendranatha, et al. "Methods and systems to monitor health of rotor blades." U.S. Patent No. 9,657,588. 23 May 2017. ()
- Panicker, Mahesh Raveendranatha, et al. "Methods and systems to monitor health of rotor blades." U.S. Patent Application No. 14/140,654. ()
- Panicker, Mahesh Raveendranatha, et al. "Methods and systems to determine rotor imbalance." U.S. Patent Application No. 14/565,981. ()
- Panicker, Mahesh Raveendranatha, et al. "Systems and methods for inspecting reinforced concrete structures." U.S. Patent No. 9,194,819. 24 Nov. 2015. ()
- Panicker, Mahesh Raveendranatha, et al. "System and method of determining bearing health in a rotating machine." U.S. Patent No. 9,574,965. 21 Feb. 2017. ()
- Panicker, Mahesh Raveendranatha, et al. "Methods and system for a turbocharger." U.S. Patent Application No. 14/931,906. ()
- Panicker, Mahesh R., et al. "Method of inspection for corrosion under insulation - Part I- System"
- Panicker, Mahesh R., et al. "Method of inspection for corrosion under insulation - Part II- Algorithms"
- Panicker, Mahesh R., et al. "System and method for imaging deeper tissues"
- Mahesh, R., and A. Prasad Vinod. "An area-efficient non-uniform filter bank for low overhead reconfiguration of multi-standard software radio channelizers." Journal of Signal Processing Systems 64.3 (2011): 413-428.
- Mahesh, R., and A. Prasad Vinod. "A low-complexity flexible spectrum-sensing scheme for mobile cognitive radio terminals." IEEE Transactions on Circuits and Systems II: Express Briefs 58.6 (2011): 371-375.
- Mahesh, R., and A. Prasad Vinod. "Low complexity flexible filter banks for uniform and non-uniform channelisation in software radios using coefficient decimation." IET circuits, devices & systems 5.3 (2011): 232-242.
- Mahesh, R., and A. Prasad Vinod. "Reconfigurable low area complexity filter bank architecture based on frequency response masking for nonuniform channelization in software radio receivers." IEEE Transactions on Aerospace and Electronic Systems 47.2 (2011): 1241-1255.
- Mahesh, R., and A. Prasad Vinod. "New reconfigurable architectures for implementing FIR filters with low complexity." IEEE transactions on computer-aided design of integrated circuits and systems 29.2 (2010): 275-288.
- Mahesh, R., et al. "Filter bank channelizers for multi-standard software defined radio receivers." Journal of signal processing systems 62.2 (2011): 157-171.
- Jimson Mathew, Mahesh, R., A. P. Vinod and Edmund M-K. Lai. "Realization of low power high-speed channel filters with stringent adjacent channel attenuation specifications for wireless communication receivers." IEICE transactions on fundamentals of electronics, communications and computer sciences 91.9 (2008): 2564-2570.
- Mahesh, R., and A. Prasad Vinod. "Reconfigurable frequency response masking filters for software radio channelization." IEEE Transactions on Circuits and Systems II: Express Briefs 55.3 (2008): 274-278.
- Mahesh, R., and A. Prasad Vinod. "A new common subexpression elimination algorithm for realizing low-complexity higher order digital filters." IEEE transactions on computer-aided design of integrated circuits and systems 27.2 (2008): 217-229.
- Madhavanunni A.N. and Mahesh Raveendranatha Panicker, " Directional beam focusing based dual apodization approach for improved vector flow imaging ", in Proc. of IEEE ISBI 2020, Iowa City, April 2020
- Madhavanunni A.N. and Mahesh Raveendranatha Panicker, "Triangulation based vector flow imaging with non-steered plane waves for transverse flows", in Proc. of SPIE Medical Imaging 2020, Houston, Feb 2020
- Samhitha Rachakonda and R. Mahesh, "Automated Noise Detection and Classification for Unsupervised ECG Analysis Systems Using CEEMD and Wavelet Packet Decomposition," in Proc. of TENCON 2019, Kochi, Oct 2019.
- Mahesh, R., P. Bhushan, Ek Tsoon Tan, J. Suresh, M. Radhika, M. Luca, M. Rakesh, “Improving neighbourhood voxel correlation in resting state fMRI using BOLD signal decomposition,” in Proc. of OHBM 2016, Geneva, Switzerland, June 2016.
- P. Bhushan, Mahesh, R., Ek Tsoon Tan, J. Suresh, M. Radhika, M. Luca, M. Rakesh, “Spatiotemporal denoising in resting state fMRI,” in Proc. of OHBM 2016, Geneva, Switzerland, June 2016.
- P. Bhushan, Mahesh, R., M. Radhika, J. Suresh, “Group NMF analysis for resting state fMRI,” in Proc. of ISMRM 2016, Singapore, May 2016.
- Mahesh, R., P. Bhushan, Ek Tsoon Tan, J. Suresh, “Blind functional clustering of resting state fMRI using non-negative matrix factorization,” in Proc. of OHBM 2016, Hawaii, June 2015
July - Dec 2018:
· Analog and Digital Communication Systems
· Control Systems Lab
Jan - May 2019:
· Microprocessor Systems: Design and Interfacing (Theory & Lab)
July - Dec 2019:
· Digital Image Processing
· Digital Circuits Lab
Jan - May 2020:
· Microprocessor Systems: Design and Interfacing (Theory & Lab)